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Chapter 1
F1-2(1)
A low-priority task is executing.
F1-2(2)
An interrupt occurs, and the CPU vectors to the ISR responsible for servicing
the interrupting device.
F1-2(3)
The ISR services the interrupt device, but actually does very little work. The ISR
will signal or send a message to a higher-priority task that will be responsible
for most of the processing of the interrupting device. For example, if the
interrupt comes from an Ethernet controller, the ISR simply signals a task,
which will process the received packet.
F1-2(4)
F1-2(5)
F1-2(6)
F1-2(7)
When the ISR finishes, μC/OS-III notices that a more important task has been
made ready to run by the ISR and will not return to the interrupted task, but
instead context switch to the more important task.
The higher-priority task executes and performs the necessary processing in
response to the interrupt device.
When the higher-priority task completes its work, it loops back to the
beginning of the task code and makes a μC/OS-III function call to wait for the
next interrupt from the device.
The low-priority task resumes exactly at the point where it was interrupted, not
knowing what happened.
Kernels such as μC/OS-III are also responsible for managing communication between tasks,
and managing system resources (memory and I/O devices).
A kernel adds overhead to a system because the services provided by the kernel require
time to execute. The amount of overhead depends on how often these services are invoked.
In a well-designed application, a kernel uses between 2% and 4% of a CPU’s time. And,
since μC/OS-III is software that is added to an application, it requires extra ROM (code
space) and RAM (data space).
Low-end single-chip microcontrollers are generally not able to run a real-time kernel such
as μC/OS-III since they have access to very little RAM. μC/OS-III requires between 1 Kbyte
and 4 Kbytes of RAM, plus each task requires its own stack space. It is possible for
μC/OS-III to work on processors having as little as 4 Kbytes of RAM.
18
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